DC Current Harmonics Reduction in Multi-Inverter Topology
Jara, Werner
- 1
- 2
- 3Universidad de Concepcion
- 4University of Sheffield
- 5Universitat Politecnica de Valencia
- 6Pontificia Universidad Catolica de Valparaiso
Journal
ieee transactions on power delivery
ISSN
0885-8977
1937-4208
Open Access
green
Volume
37
Start page
4489
End page
4492
This letter presents a Space Vector Pulse Width Modulation (SVPWM) strategy for reducing the DC-link current harmonics in a multi- Voltage Source Inverter (VSI) topology with common DC-link bus. The DC current harmonic reduction is achieved by phase-shifting the PWM pattern of individual VSIs, with the inverters sharing the system total power. Simulation and experimental results are shown to validate the proposal.